lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:	Wed, 07 Mar 2007 09:51:56 +0100
From:	Michael Ellerman <michael@...erman.id.au>
To:	"Eric W. Biederman" <ebiederm@...ssion.com>
Cc:	Linus Torvalds <torvalds@...ux-foundation.org>,
	linux-kernel@...r.kernel.org, linux-pci@...ey.karlin.mff.cuni.cz,
	Greg Kroah-Hartman <gregkh@...e.de>
Subject: Re: [PATCH 2/3] msi:  Fixup the msi enable/disable logic

On Tue, 2007-03-06 at 22:19 -0700, Eric W. Biederman wrote:
> Michael Ellerman <michael@...erman.id.au> writes:
> 
> >
> > Hi Eric, comments below ..
> >
> >
> > I get the reasoning for disabling MSI before we start writing back the
> > config space, but don't we want to re-enable MSI on the way out?
> 
> We are restoring the entire msi flags register which includes the enable bit,
> setting it a second time is gratuitous.
> 
> In addition if we are restoring the register when the enable bit is not set.
> (because we don't have a mask bit) enabling the msi state is actually
> the wrong thing to do.    But I admit that case can only happen after
> the additions in my last patch.

Yeah, duh.

cheers

-- 
Michael Ellerman
OzLabs, IBM Australia Development Lab

wwweb: http://michael.ellerman.id.au
phone: +61 2 6212 1183 (tie line 70 21183)

We do not inherit the earth from our ancestors,
we borrow it from our children. - S.M.A.R.T Person

Download attachment "signature.asc" of type "application/pgp-signature" (190 bytes)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ