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Message-ID: <20070320224324.GL10459@waste.org>
Date: Tue, 20 Mar 2007 17:43:24 -0500
From: Matt Mackall <mpm@...enic.com>
To: Jeremy Fitzhardinge <jeremy@...p.org>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>,
"Eric W. Biederman" <ebiederm@...ssion.com>,
Zachary Amsden <zach@...are.com>,
Rusty Russell <rusty@...tcorp.com.au>, Andi Kleen <ak@....de>,
David Miller <davem@...emloft.net>, mingo@...e.hu,
akpm@...ux-foundation.org, linux-kernel@...r.kernel.org,
virtualization@...ts.osdl.org, xen-devel@...ts.xensource.com,
chrisw@...s-sol.org, anthony@...emonkey.ws, netdev@...r.kernel.org
Subject: Re: [patch 13/26] Xen-paravirt_ops: Consistently wrap paravirt ops callsites to make them patchable
On Tue, Mar 20, 2007 at 09:31:58AM -0700, Jeremy Fitzhardinge wrote:
> Linus Torvalds wrote:
> > On Tue, 20 Mar 2007, Eric W. Biederman wrote:
> >
> >> If that is the case. In the normal kernel what would
> >> the "the oops, we got an interrupt code do?"
> >> I assume it would leave interrupts disabled when it returns?
> >> Like we currently do with the delayed disable of normal interrupts?
> >>
> >
> > Yeah, disable interrupts, and set a flag that the fake "sti" can test, and
> > just return without doing anything.
> >
> > (You may or may not also need to do extra work to Ack the hardware
> > interrupt etc, which may be irq-controller specific. Once the CPU has
> > accepted the interrupt, you may not be able to just leave it dangling)
> >
>
> So it would be something like:
>
> pda.intr_mask = 1; /* disable interrupts */
> ...
> pda.intr_mask = 0; /* enable interrupts */
> if (xchg(&pda.intr_pending, 0)) /* check pending */
> asm("sti"); /* was pending; isr left cpu interrupts masked */
I don't know that you need an xchg there. If you're still on the same
CPU, it should all be nice and causal even across an interrupt handler.
So it could be:
pda.intr_mask = 0; /* intr_pending can't get set after this */
if (unlikely(pda.intr_pending)) {
pda.intr_pending = 0;
asm("sti");
}
(This would actually need a C barrier, but I'll ignore that as this'd
end up being asm...)
But other interesting things could happen. If we never did a real CLI
and we get preempted and switched to another CPU between clearing
intr_mask and checking intr_pending, we get a little confused.
But perhaps that doesn't matter because we'd by definition have no
pending interrupts on either processor?
Is it expensive to do an STI if interrupts are already enabled?
--
Mathematics is the supreme nostalgia of our time.
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