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Message-ID: <20070427165522.GI24852@thunk.org>
Date:	Fri, 27 Apr 2007 12:55:22 -0400
From:	Theodore Tso <tytso@....edu>
To:	Andrew Morton <akpm@...ux-foundation.org>
Cc:	David Chinner <dgc@....com>, clameter@....com,
	linux-kernel@...r.kernel.org, Mel Gorman <mel@...net.ie>,
	William Lee Irwin III <wli@...omorphy.com>,
	Jens Axboe <jens.axboe@...cle.com>,
	Badari Pulavarty <pbadari@...il.com>,
	Maxim Levitsky <maximlevitsky@...il.com>
Subject: Re: [00/17] Large Blocksize Support V3

On Thu, Apr 26, 2007 at 10:15:28PM -0700, Andrew Morton wrote:
> And hardware gets better.  If Intel & AMD come out with a 16k pagesize
> option in a couple of years we'll look pretty dumb.  If the problems which
> you're presently having with that controller get sorted out in the next
> generation of the hardware, we'll also look pretty dumb.

Unfortunately, this isn't a problem with hardware getting better, but
a willingness to break backwards compatibility.

x86_64 uses a 4k page size to avoid breaking 32-bit applications.  And
unfortunately, iirc, even 64-bit applications are continuing to depend
on 4k page alignments for things like the text and bss segments.  If
the userspace ELF and other compiler/linker specifications were
appropriate written so they could handle 16k pagesizes, maybe 5 years
from now we could move to a 16k pagesize.  But this is going to
require some coordination between the userspace binutils folks and
AMD/Intel in order to plan such a migration.

							- Ted
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