linux-kernel - Re: [00/17] Large Blocksize Support V3

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Date:	Fri, 27 Apr 2007 10:32:07 -0700
From:	Nicholas Miell <nmiell@...cast.net>
To:	Theodore Tso <tytso@....edu>
Cc:	Andrew Morton <akpm@...ux-foundation.org>,
	David Chinner <dgc@....com>, clameter@....com,
	linux-kernel@...r.kernel.org, Mel Gorman <mel@...net.ie>,
	William Lee Irwin III <wli@...omorphy.com>,
	Jens Axboe <jens.axboe@...cle.com>,
	Badari Pulavarty <pbadari@...il.com>,
	Maxim Levitsky <maximlevitsky@...il.com>
Subject: Re: [00/17] Large Blocksize Support V3

On Fri, 2007-04-27 at 12:55 -0400, Theodore Tso wrote:
> On Thu, Apr 26, 2007 at 10:15:28PM -0700, Andrew Morton wrote:
> > And hardware gets better.  If Intel & AMD come out with a 16k pagesize
> > option in a couple of years we'll look pretty dumb.  If the problems which
> > you're presently having with that controller get sorted out in the next
> > generation of the hardware, we'll also look pretty dumb.
> 
> Unfortunately, this isn't a problem with hardware getting better, but
> a willingness to break backwards compatibility.
> 
> x86_64 uses a 4k page size to avoid breaking 32-bit applications.  And
> unfortunately, iirc, even 64-bit applications are continuing to depend
> on 4k page alignments for things like the text and bss segments.  If
> the userspace ELF and other compiler/linker specifications were
> appropriate written so they could handle 16k pagesizes, maybe 5 years
> from now we could move to a 16k pagesize.  But this is going to
> require some coordination between the userspace binutils folks and
> AMD/Intel in order to plan such a migration.
> 
> 							- Ted

The AMD64 psABI requires binaries to work with any page size up to 64k.

Whether that's true in practice is another matter entirely, of course.

-- 
Nicholas Miell <nmiell@...cast.net>

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