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Message-ID: <20070620124959.GB24906@frankl.hpl.hp.com>
Date: Wed, 20 Jun 2007 05:49:59 -0700
From: Stephane Eranian <eranian@....hp.com>
To: Andi Kleen <ak@...e.de>
Cc: Björn Steinbrink <B.Steinbrink@....de>,
mingo@...e.hu, linux-kernel@...r.kernel.org,
levon@...ementarian.org, perfmon@...ali.hpl.hp.com,
oprofile-list@...ts.sourceforge.net, wcohen@...hat.com,
akpm@...ux-foundation.org
Subject: Re: [perfmon] Re: [PATCH 1/2] Separate the performance counter allocation from the LAPIC NMI watchdog
Andi,
On Wed, Jun 20, 2007 at 02:31:43PM +0200, Andi Kleen wrote:
> On Wednesday 20 June 2007 12:35:56 Björn Steinbrink wrote:
> > The performance counter allocator is tied to the LAPIC NMI watchdog,
>
> That's not true. It's completely independent. It just happens to be in
> the same file, but it has no direct functional ties to the watchdog.
>
I agree with you that the allocator is functionally independent of the
watchdog. That is how I'd like to see it and I think we all agree on
that.
Yet in the current implementation, there is a link between the two which
causes the issues I ran into. If you look at:
static inline unsigned int nmi_evntsel_msr_to_bit(unsigned int msr)
{
return wd_ops ? msr - wd_ops->evntsel : 0;
}
int reserve_evntsel_nmi(unsigned int msr)
{
unsigned int counter;
counter = nmi_evntsel_msr_to_bit(msr);
BUG_ON(counter > NMI_MAX_COUNTER_BITS);
....
}
You see that if the wd_ops (a watchdog structure) is not initialized
then the allocator collapses all MSRs onto one bit.
Once this is fixed (which is what Bjorn did), then I will agree with you.
For this, the allocator needs to be able to probe the CPU and initialize
its own data structures.
--
-Stephane
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