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Message-ID: <20070620183551.GC3251@atjola.homenet>
Date: Wed, 20 Jun 2007 20:35:51 +0200
From: Björn Steinbrink <B.Steinbrink@....de>
To: Andi Kleen <ak@...e.de>, eranian@....hp.com, mingo@...e.hu,
linux-kernel@...r.kernel.org, levon@...ementarian.org,
perfmon@...ali.hpl.hp.com, oprofile-list@...ts.sourceforge.net,
wcohen@...hat.com, akpm@...ux-foundation.org
Subject: [PATCH 2/2] Reserve the right performance counter for the Intel PerfMon NMI watchdog
The Intel PerfMon NMI watchdog was using the generic reservation
function which always reserves the first performance counter. But the
watchdog actually uses the second performance counter, thus we need a
specialised function.
Signed-off-by: Björn Steinbrink <B.Steinbrink@....de>
---
arch/i386/kernel/cpu/perfctr-watchdog.c | 22 ++++++++++++++++++++--
1 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/arch/i386/kernel/cpu/perfctr-watchdog.c b/arch/i386/kernel/cpu/perfctr-watchdog.c
index a12dbcf..efc3232 100644
--- a/arch/i386/kernel/cpu/perfctr-watchdog.c
+++ b/arch/i386/kernel/cpu/perfctr-watchdog.c
@@ -562,9 +562,27 @@ static int setup_intel_arch_watchdog(unsigned nmi_hz)
return 1;
}
+static int intel_arch_reserve(void)
+{
+ if (!reserve_perfctr_nmi(MSR_ARCH_PERFMON_PERFCTR1))
+ return 0;
+
+ if (!reserve_evntsel_nmi(MSR_ARCH_PERFMON_EVENTSEL1)) {
+ release_perfctr_nmi(MSR_ARCH_PERFMON_PERFCTR1);
+ return 0;
+ }
+ return 1;
+}
+
+static void intel_arch_unreserve(void)
+{
+ release_evntsel_nmi(MSR_ARCH_PERFMON_EVENTSEL1);
+ release_perfctr_nmi(MSR_ARCH_PERFMON_PERFCTR1);
+}
+
static struct wd_ops intel_arch_wd_ops = {
- .reserve = single_msr_reserve,
- .unreserve = single_msr_unreserve,
+ .reserve = intel_arch_reserve,
+ .unreserve = intel_arch_unreserve,
.setup = setup_intel_arch_watchdog,
.rearm = p6_rearm,
.stop = single_msr_stop_watchdog,
--
1.5.2.2
-
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