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Message-ID: <Pine.LNX.4.64.0708071803570.28199@lancer.cnet.absolutedigital.net>
Date:	Tue, 7 Aug 2007 18:15:37 -0400 (EDT)
From:	Cal Peake <cp@...olutedigital.net>
To:	Linus Torvalds <torvalds@...ux-foundation.org>
cc:	Chuck Ebbert <cebbert@...hat.com>,
	Gabriel C <nix.or.die@...glemail.com>,
	Frank Hale <frankhale@...il.com>,
	Kernel Mailing List <linux-kernel@...r.kernel.org>,
	Kernel ACPI Mailing List <linux-acpi@...r.kernel.org>,
	len.brown@...el.com, Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...e.hu>,
	Andrew Morton <akpm@...ux-foundation.org>,
	Andi Kleen <andi@...stfloor.org>
Subject: Re: ACPI on Averatec 2370

On Fri, 3 Aug 2007, Linus Torvalds wrote:

> > MSR_K8_ENABLE_C1E lo == 0x04c14015
> > MSR_K8_ENABLE_C1E hi == 0x00000000
> > lo & ENABLE_C1E_MASK == 0
> 
> And yeah, that claims that C1E is not on, but:
> 
> > amd_apic_timer_broken: forcing return value of 1

So it seems my initial debugging report was, err, incomplete. I failed to 
notice that the amd_apic_timer_broken function was getting called twice, 
once for each core.

The second call shows this:

  MSR_K8_ENABLE_C1E == 0x14c14015

which causes our ENABLE_C1E_MASK check to be true and thus properly 
return 1 from the function. So when we call the above function from 
init_amd we prolly need to do a

  set_bit(X86_FEATURE_LAPIC_TIMER_BROKEN, c->x86_capability);

for each core if any of them happen to return true upon checking for a 
broken timer.

Andi, does that seem right?

-- 
Cal Peake

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