linux-kernel - Re: [patches] [patch 3/5] x86: Add PCI extended config space access for AMD Barcelona

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20070906111437.76343d44@laptopd505.fenrus.org>
Date:	Thu, 6 Sep 2007 11:14:37 +0100
From:	Arjan van de Ven <arjan@...radead.org>
To:	"Andreas Herrmann" <andreas.herrmann3@....com>
Cc:	"H. Peter Anvin" <hpa@...or.com>,
	"Robert Richter" <robert.richter@....com>, patches@...-64.org,
	linux-kernel@...r.kernel.org
Subject: Re: [patches] [patch 3/5] x86: Add PCI extended config space access
 for AMD Barcelona

On Wed, 5 Sep 2007 17:00:27 +0200
"Andreas Herrmann" <andreas.herrmann3@....com> wrote:

> On Wed, Sep 05, 2007 at 06:58:58AM +0100, H. Peter Anvin wrote:
> > Well, they don't add any functionality, do they?
> 
> They allow CF8/CFC to access ECS in cases where mmcfg is not working.
> 

just for the record; I have absolutely no problem with allowing the new
cf8 method (I'm assuming that it's obvious that if mmio is available,
that will be used instead for performance reasons). What I was/am
concerned/uncomfortable about is keying this off the CPU level rather
than a PCI level property; I much rather would see this keyed of, say,
the PCI ID of the root bridge, or ideally from some PCI property.
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/