linux-kernel - Re: [PATCH] ahci: enable GHC.AE bit before set GHC.HR

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Message-ID: <20070926122332.39351382@the-village.bc.nu>
Date:	Wed, 26 Sep 2007 12:23:32 +0100
From:	Alan Cox <alan@...rguk.ukuu.org.uk>
To:	Jeff Garzik <jeff@...zik.org>
Cc:	Peer Chen <peerchen@...il.com>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	akpm <akpm@...ux-foundation.org>,
	linux-ide <linux-ide@...r.kernel.org>
Subject: Re: [PATCH] ahci: enable GHC.AE bit before set GHC.HR

On Wed, 26 Sep 2007 00:03:19 -0400
Jeff Garzik <jeff@...zik.org> wrote:

> Peer Chen wrote:
> > According to the description of section 5.2.2.1 and 10.1.2 of AHCI specification rev1_1/rev1_2, GHC.HR shall only be set to ¡®1¡¯
> > by software when GHC.AE is set to ¡®1¡¯.
> > 
> > Signed-off-by: Peer Chen <peerchen@...il.com>
> > ---
> > --- linux-2.6.23-rc7/drivers/ata/ahci.c.orig	2007-09-20 11:01:55.000000000 -0400
> > +++ linux-2.6.23-rc7/drivers/ata/ahci.c	2007-09-20 11:07:31.000000000 -0400
> > @@ -834,6 +834,10 @@ static int ahci_reset_controller(struct 
> >  	void __iomem *mmio = host->iomap[AHCI_PCI_BAR];
> >  	u32 tmp;
> >  
> > +        /* turn on AHCI mode before controller reset*/
> > +        writel(HOST_AHCI_EN, mmio + HOST_CTL);
> > +        (void) readl(mmio + HOST_CTL);  /* flush */
> 
> applied the attached patch, inspired by yours.


NAK - mmio is an iomap so writel and readl are the wrong things to use

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