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Message-ID: <alpine.LRH.0.999.0710011652470.7353@www.tglx.de>
Date:	Mon, 1 Oct 2007 16:59:55 +0200 (CEST)
From:	Thomas Gleixner <tglx@...utronix.de>
To:	Andi Kleen <andi@...stfloor.org>
cc:	Mikhail Kshevetskiy <mikhail.kshevetskiy@...il.com>,
	linux-kernel@...r.kernel.org
Subject: Re: Fwd: x86_64 and AMD with C1E

On Mon, 1 Oct 2007, Andi Kleen wrote:
> > There is work in progress on a patch, which allows to utilize the hpet
> > timers as per cpu timers. This should solve the problem. Be patient.
> 
> Given that e.g. ICH8 only has 3 HPET timers that seems doubtful
> except for the special case of single-socket non hyper threaded dual core.
> You'll probably do a lot of broadcasting and IPI'ing still.
> 
> Also you'll likely make user space unhappy which often requires 
> at least one free HPET timer for /dev/rtc. Ok I suppose that 
> could be replaced with a hrtimer.

Yes, we can replace rtc with a hrtimer. Also HPET can operate in non
legacy irq mode, so the legacy rtc is still available. So if the
number of hpet channels is greater/equal to the number of possible
CPUs it's perfectly fine and does not need IPI at all.

Thanks,

	tglx

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