linux-kernel - Re: Fwd: x86_64 and AMD with C1E

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Message-ID: <alpine.LFD.0.9999.0710011829370.19561@localhost.localdomain>
Date:	Mon, 1 Oct 2007 18:44:08 +0200 (CEST)
From:	Thomas Gleixner <tglx@...utronix.de>
To:	Andi Kleen <andi@...stfloor.org>
cc:	Mikhail Kshevetskiy <mikhail.kshevetskiy@...il.com>,
	linux-kernel@...r.kernel.org
Subject: Re: Fwd: x86_64 and AMD with C1E

On Mon, 1 Oct 2007, Andi Kleen wrote:
> > So if the
> > number of hpet channels is greater/equal to the number of possible
> > CPUs it's perfectly fine and does not need IPI at all.
> 
> That is only a stop gap then. I don't see this being
> generally true in the future. e.g. Intel announced SMT will be soon 
> back so even a standard dual core would exceed it with
> current southbridges.

Sigh. We have to deal with current hardware and the problems of exactly 
that hardware. We have the possibility to solve problems and witchcrafting 
what might happen next is not a good reason not to do so.

> Also I'm not sure but I suspect non Intel HPETs have less than
> three timers. Certainly they generally miss the 64bitness.

two timers are enough and 64 bit is nice to have, but not a requirement.

	tglx

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