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Message-ID: <476AB525.2050407@zytor.com>
Date:	Thu, 20 Dec 2007 10:32:05 -0800
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Arjan van de Ven <arjan@...radead.org>
CC:	Ingo Molnar <mingo@...e.hu>,
	Venki Pallipadi <venkatesh.pallipadi@...el.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Len Brown <lenb@...nel.org>,
	linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] x86: Voluntary leave_mm before entering ACPI C3

Arjan van de Ven wrote:
> On Thu, 20 Dec 2007 08:16:54 -0800
> "H. Peter Anvin" <hpa@...or.com> wrote:
> 
>> Arjan van de Ven wrote:
>>> On Wed, 19 Dec 2007 11:48:14 -0800
>>> "H. Peter Anvin" <hpa@...or.com> wrote:
>>>
>>>> I think C3 guarantees that the cache contents stay intact, and thus
>>>> it might make sense in some technology to preserve the TLB as well
>>>> (being a kind of cache.)
>>> that sounds nice. It's fiction though ;-)
>>>
>>> The thing to realize is that linux only sees "ACPI C3"; the BIOS
>>> maps that C3 to.. well any of the C states the processor in the
>>> system has. What you're saying is afaik correct for the *hardware*
>>> C3, not for the "C3" that Linux sees..
>>>
>> Well, it can only map ACPI C3 to a state which is no more "dead" than 
>> what would normally be permitted by C3.  IIRC, C3 is allowed to
>> require that DMA be turned off (unlike C2), but is not allowed to
>> lose the CPU state.
> 
> state isn't lost if the tlb or the caches are flushed... 
> (properly, eg all pending writebacks are written back first etc)
> 

Oh, right.  My bad.

Of course C3 doesn't guarantee cache retention, only cache coherency.

	-hpa
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