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Message-ID: <alpine.DEB.0.999999.0801110856230.9361@twinlark.arctic.org> Date: Fri, 11 Jan 2008 09:02:46 -0800 (PST) From: dean gaudet <dean@...tic.org> To: Ingo Molnar <mingo@...e.hu> cc: Andi Kleen <ak@...e.de>, linux-kernel@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>, "H. Peter Anvin" <hpa@...or.com>, Venki Pallipadi <venkatesh.pallipadi@...el.com>, suresh.b.siddha@...el.com, Arjan van de Ven <arjan@...radead.org>, Dave Jones <davej@...hat.com> Subject: Re: CPA patchset On Fri, 11 Jan 2008, Ingo Molnar wrote: > * Andi Kleen <ak@...e.de> wrote: > > > Cached requires the cache line to be read first before you can write > > it. > > nonsense, and you should know it. It is perfectly possible to construct > fully written cachelines, without reading the cacheline first. MOVDQ is > SSE1 so on basically in every CPU today - and it is 16 byte aligned and > can generate full cacheline writes, _without_ filling in the cacheline > first. did you mean to write MOVNTPS above? > Bulk ops (string ops, etc.) will do full cacheline writes too, > without filling in the cacheline. on intel with fast strings enabled yes. mind you intel gives hints in the documentation these operations don't respect coherence... and i asked about this when they posted their memory ordering paper but got no response. -dean -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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