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Message-id: <200801202257.47195.yinghai.lu@sun.com>
Date: Sun, 20 Jan 2008 22:57:46 -0800
From: Yinghai Lu <Yinghai.Lu@....COM>
To: Andi Kleen <ak@...e.de>, Ingo Molnar <mingo@...e.hu>
Cc: "H. Peter Anvin" <hpa@...or.com>,
LKML <linux-kernel@...r.kernel.org>,
Jesse Barnes <jesse.barnes@...el.com>,
Andrew Morton <akpm@...ux-foundation.org>
Subject: [PATCH] x86_64: check if Tom2 is enabled
[PATCH] x86_64: check if Tom2 is enabled
need to applied after andi's amd special tom2 wb check patch
in amd_special_default_mtrr need to check if TOM2 is enabled
Signed-off-by: Yinghai Lu <yinghai.lu@....com>
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
index 289ba1a..26eed57 100644
--- a/arch/x86/kernel/cpu/mtrr/main.c
+++ b/arch/x86/kernel/cpu/mtrr/main.c
@@ -641,6 +641,7 @@ early_param("disable_mtrr_trim", disable_mtrr_trim_setup);
* Note this won't check if the MTRRs < 4GB where the magic bit doesn't
* apply to are wrong, but so far we don't know of any such case in the wild.
*/
+#define Tom2Enabled (1U << 21)
#define Tom2ForceMemTypeWB (1U << 22)
static __init int amd_special_default_mtrr(void)
@@ -661,7 +662,8 @@ static __init int amd_special_default_mtrr(void)
* Memory between 4GB and top of mem is forced WB by this magic bit.
* Reserved before K8RevF, but should be zero there.
*/
- if (l & Tom2ForceMemTypeWB)
+ if ((l & (Tom2Enabled | Tom2ForceMemTypeWB)) ==
+ (Tom2Enabled | Tom2ForceMemTypeWB))
return 1;
return 0;
}
--
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