linux-kernel - Re: [PATCH] atmel_spi: support zero length transfer

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <200802201855.02605.marc.pignat@hevs.ch>
Date:	Wed, 20 Feb 2008 18:55:01 +0100
From:	Marc Pignat <marc.pignat@...s.ch>
To:	Atsushi Nemoto <anemo@....ocn.ne.jp>
Cc:	Haavard Skinnemoen <hskinnemoen@...el.com>,
	David Brownell <david-b@...bell.net>,
	spi-devel-general@...ts.sourceforge.net,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] atmel_spi: support zero length transfer

Hi!

On Wednesday 20 February 2008, you wrote:
> A spi transfer with zero length is not invalid.  Such transfer can be
> used to achieve delay before first CLK edge after chipselect assertion.
How long will be that delay?

If they are really users of that kind of thing, this should be fixed by adding
a "delay_us_before_xfer" field in the  struct spi_transfer.

Have you tested it? I think if you start a transfer with 0 len, the ENDRX bit
will never rise, however, I'm not sure about this.

Regards

Marc
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/