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Message-Id: <200803121558.37960.david-b@pacbell.net>
Date:	Wed, 12 Mar 2008 14:58:37 -0800
From:	David Brownell <david-b@...bell.net>
To:	Andrew Morton <akpm@...ux-foundation.org>
Cc:	lkml <linux-kernel@...r.kernel.org>,
	Russell King <rmk@....linux.org.uk>
Subject: Re: [patch 2.6.25-rc5] kerneldoc for <linux/clk.h>

Proof-reading doesn't always cut it ... an editor could help!

Signed-off-by: David Brownell <dbrownell@...rs.sourceforge.net>
---
Just editorial fixes to the $SUBJECT patch.

 Documentation/DocBook/kernel-api.tmpl |   13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

--- g26.orig/Documentation/DocBook/kernel-api.tmpl	2008-03-12 00:43:43.000000000 -0700
+++ g26/Documentation/DocBook/kernel-api.tmpl	2008-03-12 15:41:48.000000000 -0700
@@ -671,16 +671,15 @@ X!Idrivers/video/console/fonts.c
 	Power management is supported by explicit software clock gating:
 	unused clocks are disabled, so the system doesn't waste power
 	changing the state of transistors that aren't in active use.
-	On some systems this may be backed by hardware clock gating.
-	Circuits will still have leakage current to be managed, which
-	costs more with finer cicuit geometries, but for CMOS circuits
-	power is mostly spent by clocked state changes.
+	On some systems this may be backed by hardware clock gating,
+	where clocks are gated without being disabled in software.
 	Sections of chips that are powered but not clocked may be able
 	to retain their last state.
 	This low power state is often called a <emphasis>retention
-	mode</emphasis>, in contrast to <emphasis>off</emphasis> where
-	power is cut and no state is retained but where leakage currents
-	may have a significant impact on battery life.
+	mode</emphasis>.
+	This mode still incurs leakage currents, especially with finer
+	circuit geometries, but for CMOS circuits power is mostly used
+	by clocked state changes.
      </para>
 
      <para>
--
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