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Message-ID: <47E9948C.3070807@zytor.com>
Date: Tue, 25 Mar 2008 17:10:52 -0700
From: "H. Peter Anvin" <hpa@...or.com>
To: Yinghai Lu <yhlu.kernel@...il.com>
CC: Ingo Molnar <mingo@...e.hu>,
Venki Pallipadi <venkatesh.pallipadi@...el.com>,
Thomas Gleixner <tglx@...utronix.de>,
Andrew Morton <akpm@...ux-foundation.org>,
kernel list <linux-kernel@...r.kernel.org>,
suresh.b.siddha@...el.com
Subject: Re: [PATCH] x86: pat cpu feature bit setting for known cpus
Yinghai Lu wrote:
> On Tue, Mar 25, 2008 at 4:06 PM, H. Peter Anvin <hpa@...or.com> wrote:
>> Yinghai Lu wrote:
>> >>
>> >> By the way, I want to clarify: I didn't mean it was *intended* as
>> >> vendor-lockin, just that it's an undesirable effect of this.
>> >
>> > if the PAT works, we may need to trim the memory according to MTRR, right?
>> >
>>
>> That doesn't seem like it's specific to PAT?
>
> could page table to set WRBACK the range that is not covered by MTRR in e820..
>
We have to trim anyway... lest we end up using uncached memory and then
we're in a world of hurt.
-hpa
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