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Message-ID: <20080503153521.1d6705cd@core>
Date:	Sat, 3 May 2008 15:35:21 +0100
From:	Alan Cox <alan@...rguk.ukuu.org.uk>
To:	"H. Peter Anvin" <hpa@...or.com>
Cc:	Roland Dreier <rdreier@...co.com>,
	"Moore\, Eric" <Eric.Moore@....com>, linux-kernel@...r.kernel.org
Subject: Re: HELP:  Is writeq an atomic operation??

> > I don't have an authoritative answer, but I can say that I coded
> > drivers/infiniband/hw/mthca and .../mlx4 assuming that writeq() is
> > atomic in the sense that you say, and no one has reported any problems.
> > 
> 
> If you're not under lock you're screwed on a 32-bit platform.

So what cycles does an MMX, SSE or double float store generate on the
bus ?

Alan
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