linux-kernel - Re: NIU - Sun Neptune 10g - Transmit timed out reset (2.6.24)

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Message-Id: <20080509222006.6a43e740.billfink@mindspring.com>
Date:	Fri, 9 May 2008 22:20:06 -0400
From:	Bill Fink <billfink@...dspring.com>
To:	Jesper Krogh <jesper@...gh.cc>
Cc:	Rick Jones <rick.jones2@...com>,
	David Miller <davem@...emloft.net>, yhlu.kernel@...il.com,
	linux-kernel@...r.kernel.org, netdev@...r.kernel.org
Subject: Re: NIU - Sun Neptune 10g - Transmit timed out reset (2.6.24)

On Sat, 10 May 2008, Jesper Krogh wrote:

> Rick Jones wrote:
> > 
> > Into which slot was the Neptune inserted?  (sure will be nice to have 
> > Alex Chiang's pci slot id patch in mainline one of these days :)
> > 
> > Is that slot x4, x8, x16?
> 
> I can find out excactly .. on monday. But shouldn't x4 be enough anyway?
> wikipedia says 250MB/s pr. lane. And no slots is less than x4, so I
> thought that it didn't matter to me.

No you need 8x for 10-GigE.  The 250 MB/sec per lane is 2 Gbps per lane
so 4x is only 8 Gbps.  For a typical PCI-E transaction size of 128 bytes,
and PCI-E protocol overhead of 20 to 24 bytes, that takes off about 20%,
which leaves you with about 6.5 Gbps of usable bandwidth, which is further
reduced somewhat by the required PCI-E ACK and flow control packets that
accompany the actual data transaction packets.  I am not an expert on
PCI-E but I believe this info to be generally correct.

						-Bill
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