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Message-ID: <4835A3EC.1030307@zytor.com>
Date:	Thu, 22 May 2008 09:48:44 -0700
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Dave Jones <davej@...hat.com>, "H. Peter Anvin" <hpa@...or.com>,
	Yinghai Lu <yhlu.kernel@...il.com>,
	Linux Kernel <linux-kernel@...r.kernel.org>,
	Ingo Molnar <mingo@...e.hu>,
	Thomas Gleixner <tglx@...utronix.de>
Subject: Re: [X86] Add recent Centaur CPUs to PAT whitelist

Dave Jones wrote:
> On Wed, May 21, 2008 at 04:56:28PM -0700, H. Peter Anvin wrote:
>  > Dave Jones wrote:
>  > > 
>  > > From conversation with Centaur engineers, both the newer generations
>  > > of the VIA C7, and their future CPUs support PAT, with no known errata.
>  > > 
>  > > Signed-off-by: Dave Jones <davej@...hat.com>
>  > > 
>  > 
>  > Question: are there any VIA CPUs that display the PAT CPUID flag that 
>  > aren't covered by the above?
> 
> No.  They only added PAT support with the current Esther (C7) generation iirc.
> 

OK, so we should just enable VIA unconditionally as long as PAT is 
displayed and not worry about generation numbers; same with Transmeta 
(only the Transmeta Efficeon supported PAT, and it had a 
strictly-coherent memory system.)

	-hpa
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