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Message-ID: <20080522170223.GA32314@redhat.com>
Date: Thu, 22 May 2008 13:02:23 -0400
From: Dave Jones <davej@...hat.com>
To: "H. Peter Anvin" <hpa@...or.com>
Cc: Yinghai Lu <yhlu.kernel@...il.com>,
Linux Kernel <linux-kernel@...r.kernel.org>,
Ingo Molnar <mingo@...e.hu>,
Thomas Gleixner <tglx@...utronix.de>
Subject: Re: [X86] Add recent Centaur CPUs to PAT whitelist
On Thu, May 22, 2008 at 09:48:44AM -0700, H. Peter Anvin wrote:
> Dave Jones wrote:
> > On Wed, May 21, 2008 at 04:56:28PM -0700, H. Peter Anvin wrote:
> > > Dave Jones wrote:
> > > >
> > > > From conversation with Centaur engineers, both the newer generations
> > > > of the VIA C7, and their future CPUs support PAT, with no known errata.
> > > >
> > > > Signed-off-by: Dave Jones <davej@...hat.com>
> > > >
> > >
> > > Question: are there any VIA CPUs that display the PAT CPUID flag that
> > > aren't covered by the above?
> >
> > No. They only added PAT support with the current Esther (C7) generation iirc.
> >
>
> OK, so we should just enable VIA unconditionally as long as PAT is
> displayed and not worry about generation numbers; same with Transmeta
> (only the Transmeta Efficeon supported PAT, and it had a
> strictly-coherent memory system.)
Like so?
Unconditionally enable PAT support on Centaur and Transmeta CPUs.
All known models that advertise PAT have no known errata.
Signed-off-by: Dave Jones <davej@...hat.com>
--- linux-2.6/arch/x86/kernel/cpu/addon_cpuid_features.c~ 2008-05-22 12:59:07.000000000 -0400
+++ linux-2.6/arch/x86/kernel/cpu/addon_cpuid_features.c 2008-05-22 12:59:36.000000000 -0400
@@ -62,6 +62,9 @@ void __cpuinit validate_pat_support(stru
if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
return;
break;
+ case X86_VENDOR_CENTAUR:
+ case X86_VENDOR_TRANSMETA:
+ return;
}
pat_disable(cpu_has_pat ?
--
http://www.codemonkey.org.uk
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