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Message-Id: <1212655433.9496.109.camel@pasglop>
Date: Thu, 05 Jun 2008 18:43:53 +1000
From: Benjamin Herrenschmidt <benh@...nel.crashing.org>
To: Jes Sorensen <jes@....com>
Cc: Jesse Barnes <jbarnes@...tuousgeek.org>,
Nick Piggin <nickpiggin@...oo.com.au>,
Jeremy Higdon <jeremy@....com>,
Roland Dreier <rdreier@...co.com>,
Arjan van de Ven <arjan@...radead.org>,
linux-arch@...r.kernel.org, linux-kernel@...r.kernel.org,
tpiepho@...escale.com, linuxppc-dev@...abs.org,
scottwood@...escale.com, torvalds@...ux-foundation.org,
David Miller <davem@...emloft.net>, alan@...rguk.ukuu.org.uk
Subject: Re: MMIO and gcc re-ordering issue
On Thu, 2008-06-05 at 10:40 +0200, Jes Sorensen wrote:
> Jesse Barnes wrote:
> > Now, in hindsight, using a PIO write set & test flag approach in
> > writeX/spin_unlock (ala powerpc) might have been a better approach, but iirc
> > that never came up in the discussion, probably because we were focused on PCI
> > posting and not uncached vs. cached ordering.
>
> Hi Jesse,
>
> I am going to take a stab at implementing this so we can see how much
> of an impact it will have.
Note that the powerpc implementation currently clears the flag
on spin_lock and tests it on unlock. We are considering changing
that to not touch the flag on spin_lock and just clear it whenever
we do a sync (ie, on unlock, on explicit mmiowb, and possibly even
on readl's where we happen to do sync's).
Ben.
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