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Date:	Fri, 06 Jun 2008 09:08:08 +0100
From:	Jeremy Fitzhardinge <jeremy@...p.org>
To:	Arjan van de Ven <arjan@...radead.org>
CC:	Ingo Molnar <mingo@...e.hu>, x86@...nel.org,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	Jan Beulich <jbeulich@...ell.com>,
	Stable Kernel <stable@...nel.org>
Subject: Re: [PATCH] x86: set PAE PHYSICAL_MASK_SHIFT to match 64-bit

Arjan van de Ven wrote:
> On Thu, 05 Jun 2008 16:21:14 +0100
> Jeremy Fitzhardinge <jeremy@...p.org> wrote:
>
>   
>> When a 64-bit x86 processor runs in 32-bit PAE mode, a pte can
>> potentially have the same number of physical address bits as the
>> 64-bit host ("Enhanced Legacy PAE Paging").
>>
>>     
>
> the problem on 32 bit is that if you have that much ram, you run out of
> lowmem FAST.... so you have bigger problems.
>   

Sure, you'd have to be barking mad to give a 32-bit system 2^40 bytes of 
RAM.  But under Xen the host's physical addresses are used in guest 
pagetables, so you could have a reasonably sized 32-bit PAE Xen guest be 
exposed to huge host physical addresses.

But the basic point is that, given that Enhanced Legacy PAE Paging 
exists, 36-bits is not  correct, so we should fix it.  And if the 
platform allows addressable hardware to be physically discontigious - 
either memory or devices - then you may end up using large numbers of 
physical bits without having a stupid amount of memory actually present.

    J
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