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Message-Id: <200806171024.40662.rusty@rustcorp.com.au>
Date: Tue, 17 Jun 2008 10:24:40 +1000
From: Rusty Russell <rusty@...tcorp.com.au>
To: Christoph Lameter <clameter@....com>
Cc: Nick Piggin <nickpiggin@...oo.com.au>,
Martin Peschke <mp3@...ibm.com>,
Andrew Morton <akpm@...ux-foundation.org>,
linux-arch@...r.kernel.org, linux-kernel@...r.kernel.org,
David Miller <davem@...emloft.net>,
Eric Dumazet <dada1@...mosbay.com>,
Peter Zijlstra <peterz@...radead.org>,
Mike Travis <travis@....com>
Subject: Re: [patch 04/41] cpu ops: Core piece for generic atomic per cpu operations
On Tuesday 17 June 2008 00:52:08 Christoph Lameter wrote:
> On Sun, 15 Jun 2008, Rusty Russell wrote:
> > > 3. Some hooks for arches to override particular behavior as needed.
> > > F.e. IA64 allocates percpu structures in a special way. x86_64
> > > needs to do some tricks for the pda etc etc.
> >
> > IA64 is going to need some work, since dynamic percpu addresses won't be
> > able to use their pinned TLB trick to get the local version.
>
> The ia64 hook could simply return the address of percpu area that
> was reserved when the per node memory layout was generated (which happens
> very early during node bootstrap).
Apologies, this time I read the code. I thought IA64 used the pinned TLB area
to access per-cpu vars under some circumstances, but they only do that via an
arch-specific macro.
So creating new congruent mappings to expand the percpu area(s) is our main
concern now?
Rusty.
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