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Message-ID: <20080625001256.GA31734@linux-os.sc.intel.com>
Date: Tue, 24 Jun 2008 17:12:56 -0700
From: Venki Pallipadi <venkatesh.pallipadi@...el.com>
To: Andi Kleen <andi@...stfloor.org>
Cc: Max Asbock <masbock@...ibm.com>,
lkml <linux-kernel@...r.kernel.org>,
"Pallipadi, Venkatesh" <venkatesh.pallipadi@...el.com>
Subject: Re: mce_64.c: mce_cpu_quirks being ignored
On Thu, Jun 19, 2008 at 02:16:17PM -0700, Andi Kleen wrote:
> Max Asbock wrote:
>
>
>
> > static void __cpuinit mce_cpu_quirks(struct cpuinfo_x86 *c)
> > {
> > /* This should be disabled by the BIOS, but isn't always */
> > if (c->x86_vendor == X86_VENDOR_AMD) {
> > if(c->x86 == 15)
> > /* disable GART TBL walk error reporting, which trips off
> > incorrectly with the IOMMU & 3ware & Cerberus. */
> > clear_bit(10, &bank[4]);
> > ....
> >
> > Is turning off that bit still needed?
>
> Yes it is. Also referencing the bank is needed for other reasons anyways,
> otherwise it would ignore the user sysfs choice on reconfiguration.
>
> Venki, I did a patch for dynamic banks anyways, but haven't submitted it yet.
>
Yes. That particular quirk getting ignored was a bug. Below patch fixes
the bug, until we have the dynamic banks support.
sysfs choice configuration should not have any issues with the earlier patch
as we look for NR_SYSFS_BANKS in do_machine_check().
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@...el.com>
---
arch/x86/kernel/cpu/mcheck/mce_64.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
Index: linux-2.6/arch/x86/kernel/cpu/mcheck/mce_64.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/cpu/mcheck/mce_64.c 2008-06-24 16:01:23.000000000 -0700
+++ linux-2.6/arch/x86/kernel/cpu/mcheck/mce_64.c 2008-06-24 16:48:01.000000000 -0700
@@ -463,7 +463,11 @@ static void mce_init(void *dummy)
wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
for (i = 0; i < banks; i++) {
- wrmsrl(MSR_IA32_MC0_CTL+4*i, ~0UL);
+ if (i < NR_SYSFS_BANKS)
+ wrmsrl(MSR_IA32_MC0_CTL+4*i, bank[i]);
+ else
+ wrmsrl(MSR_IA32_MC0_CTL+4*i, ~0UL);
+
wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0);
}
}
--
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