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Message-ID: <20080711231543.GY1678@linux-os.sc.intel.com>
Date:	Fri, 11 Jul 2008 16:15:43 -0700
From:	Suresh Siddha <suresh.b.siddha@...el.com>
To:	"Eric W. Biederman" <ebiederm@...ssion.com>
Cc:	"Siddha, Suresh B" <suresh.b.siddha@...el.com>,
	Matthew Wilcox <matthew@....cx>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"grundler@...isc-linux.org" <grundler@...isc-linux.org>,
	"mingo@...e.hu" <mingo@...e.hu>,
	"tglx@...utronix.de" <tglx@...utronix.de>,
	"jgarzik@...ox.com" <jgarzik@...ox.com>,
	"linux-ide@...r.kernel.org" <linux-ide@...r.kernel.org>,
	"benh@...nel.crashing.org" <benh@...nel.crashing.org>,
	"jbarnes@...tuousgeek.org" <jbarnes@...tuousgeek.org>,
	"rdunlap@...otime.net" <rdunlap@...otime.net>,
	"mtk.manpages@...il.com" <mtk.manpages@...il.com>
Subject: Re: Multiple MSI, take 3

On Fri, Jul 11, 2008 at 03:59:59PM -0700, Eric W. Biederman wrote:
> Suresh Siddha <suresh.b.siddha@...el.com> writes:
> 
> > With interrupt-remapping, we can program the individual interrupt
> > remapping table entries to point to different cpu's etc. All we have
> > to take care is, do the IRTE allocation in a consecutive block and
> > program the starting index to the MSI registers.
> >
> > Just curious Eric, why do you think that won't work?
> 
> Working mask/unmask.  With MSI-X as specced if I mask an irq and then unmask
> it, an msi message will fire if something happened while the irq was masked
> and not taken care of before the irq was unmasked.  That is the correct
> behavior for an irq and a mmu won't let me get that.

And why do we need to mask/unmask the device in the interrupt-remapping case?

> 
> The best I can do with an iommu is to run delayed disable and set the
> interrupt remapping slot in the iommu to reject the traffic.  Which
> is almost but not quite what I want.
> 
> Overall introducing a new concept into the linux irq model seems a lot
> cleaner and more portable, and even there we are likely to be a lot
> more fragile because of the difficulty in obtaining contiguous
> vectors.
> 
> Speaking of.  How many interrupt targets does the dmar iommu have
> for interrupts?  16K?

There can be multiple interrupt-remapping units in the platform and
each of table in the remapping unit has max 64K entries.

thanks,
suresh
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