linux-kernel - Re: [PATCH 14/20] parisc: use the new byteorder headers

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Date:	Fri, 1 Aug 2008 10:06:47 -0600
From:	Grant Grundler <grundler@...isc-linux.org>
To:	Harvey Harrison <harvey.harrison@...il.com>
Cc:	Andrew Morton <akpm@...ux-foundation.org>,
	Kyle McMartin <kyle@...artin.ca>,
	grundler <grundler@...isc-linux.org>,
	LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 14/20] parisc: use the new byteorder headers

On Thu, Jul 17, 2008 at 05:09:43PM -0700, Harvey Harrison wrote:
> Signed-off-by: Harvey Harrison <harvey.harrison@...il.com>
> ---
>  include/asm-parisc/byteorder.h |   37 ++++++++++++-------------------------
>  1 files changed, 12 insertions(+), 25 deletions(-)
> 
> diff --git a/include/asm-parisc/byteorder.h b/include/asm-parisc/byteorder.h
> index db14831..5e56b1b 100644
> --- a/include/asm-parisc/byteorder.h
> +++ b/include/asm-parisc/byteorder.h
> @@ -4,9 +4,10 @@
>  #include <asm/types.h>
>  #include <linux/compiler.h>
>  
> -#ifdef __GNUC__
> +#define __LITTLE_ENDIAN

Sorry, this looks wrong. parisc is big endian.

> +#define __SWAB_64_THRU_32__

Should this only be defined if BITS_PER_LONG is <=32  ?

thanks,
grant

>  
> -static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
> +static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
>  {
>  	__asm__("dep %0, 15, 8, %0\n\t"		/* deposit 00ab -> 0bab */
>  		"shd %%r0, %0, 8, %0"		/* shift 000000ab -> 00ba */
> @@ -14,8 +15,9 @@ static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
>  		: "0" (x));
>  	return x;
>  }
> +#define HAVE_ARCH_SWAB16
>  
> -static __inline__ __attribute_const__ __u32 ___arch__swab24(__u32 x)
> +static inline __attribute_const__ __u32 __arch_swab24(__u32 x)
>  {
>  	__asm__("shd %0, %0, 8, %0\n\t"		/* shift xabcxabc -> cxab */
>  		"dep %0, 15, 8, %0\n\t"		/* deposit cxab -> cbab */
> @@ -25,7 +27,7 @@ static __inline__ __attribute_const__ __u32 ___arch__swab24(__u32 x)
>  	return x;
>  }
>  
> -static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
> +static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
>  {
>  	unsigned int temp;
>  	__asm__("shd %0, %0, 16, %1\n\t"	/* shift abcdabcd -> cdab */
> @@ -35,7 +37,7 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
>  		: "0" (x));
>  	return x;
>  }
> -
> +#define HAVE_ARCH_SWAB32
>  
>  #if BITS_PER_LONG > 32
>  /*
> @@ -48,7 +50,8 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
>  **      HSHR    67452301 -> *6*4*2*0 into %0
>  **      OR      %0 | %1  -> 76543210 into %0 (all done!)
>  */
> -static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x) {
> +static inline __attribute_const__ __u64 __arch_swab64(__u64 x)
> +{
>  	__u64 temp;
>  	__asm__("permh,3210 %0, %0\n\t"
>  		"hshl %0, 8, %1\n\t"
> @@ -58,25 +61,9 @@ static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x) {
>  		: "0" (x));
>  	return x;
>  }
> -#define __arch__swab64(x) ___arch__swab64(x)
> -#define __BYTEORDER_HAS_U64__
> -#elif !defined(__STRICT_ANSI__)
> -static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x)
> -{
> -	__u32 t1 = ___arch__swab32((__u32) x);
> -	__u32 t2 = ___arch__swab32((__u32) (x >> 32));
> -	return (((__u64) t1 << 32) | t2);
> -}
> -#define __arch__swab64(x) ___arch__swab64(x)
> -#define __BYTEORDER_HAS_U64__
> -#endif
> -
> -#define __arch__swab16(x) ___arch__swab16(x)
> -#define __arch__swab24(x) ___arch__swab24(x)
> -#define __arch__swab32(x) ___arch__swab32(x)
> -
> -#endif /* __GNUC__ */
> +#define HAVE_ARCH_SWAB64
> +#endif /* BITS_PER_LONG > 32 */
>  
> -#include <linux/byteorder/big_endian.h>
> +#include <linux/byteorder.h>
>  
>  #endif /* _PARISC_BYTEORDER_H */
> -- 
> 1.5.6.3.569.ga9185
> 
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