linux-kernel - Re: [patch 1/5] x2apic: fix reserved APIC register accesses in print_local

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Date:	Fri, 5 Sep 2008 10:10:42 +0200
From:	Ingo Molnar <mingo@...e.hu>
To:	Suresh Siddha <suresh.b.siddha@...el.com>
Cc:	"hpa@...or.com" <hpa@...or.com>,
	"tglx@...utronix.de" <tglx@...utronix.de>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Yinghai Lu <yhlu.kernel@...il.com>,
	"Maciej W. Rozycki" <macro@...ux-mips.org>,
	Jesse Barnes <jbarnes@...tuousgeek.org>
Subject: Re: [patch 1/5] x2apic: fix reserved APIC register accesses in
	print_local_APIC()


* Suresh Siddha <suresh.b.siddha@...el.com> wrote:

> On Thu, Sep 04, 2008 at 04:06:31AM -0700, Ingo Molnar wrote:
> > 
> > applied the following patches tip/irq/sparseirq:
> 
> Ingo, Shouldn't this go to tip/x86/x2apic ? Thanks.

normally yes - but this is a special case: there's existing overlap with 
other DMAR changes in irq/sparseirq (intr-remap and ioapic unification 
changes), so these followups have to go there too. Also, since they 
change the generic PCI code it's better they live in a generic topic to 
begin with. The full stack of pending changes is:

0f48966: dmar: fix dmar_parse_dev() devices_cnt error condition check
2283240: dmar: use list_for_each_entry_safe() in dmar_dev_scope_init()
3f1fdb3: dmar: initialize the return value in dmar_parse_dev()
f12c73e: dmar: fix using early fixmap mapping for DMAR table parsing
1cb1158: x64, x2apic/intr-remap: disable DMA-remapping if Interrupt-remapping is detected (temporary quirk)
2ae2101: x64, x2apic/intr-remap: Interrupt remapping infrastructure
fe962e9: x64, x2apic/intr-remap: Queued invalidation infrastructure (part of VT-d)
ad3ad3f: x64, x2apic/intr-remap: parse ioapic scope under vt-d structures
2d6b5f8: x64, x2apic/intr-remap: Fix the need for RMRR in the DMA-remapping detection
aaa9d1d: x64, x2apic/intr-remap: use CONFIG_DMAR for DMA-remapping specific code
1886e8a: x64, x2apic/intr-remap: code re-structuring, to be used by both DMA and Interrupt remapping
c42d9f3: x64, x2apic/intr-remap: fix the need for sequential array allocation of iommus
e61d98d: x64, x2apic/intr-remap: Intel vt-d, IOMMU code reorganization

Jesse, do you have any objections to this approach?

	Ingo
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