linux-kernel - Re: [PATCH 0/4] V3 Hypervisor detection and tsc

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Message-ID: <20081027110218.GD13641@elte.hu>
Date:	Mon, 27 Oct 2008 12:02:18 +0100
From:	Ingo Molnar <mingo@...e.hu>
To:	Alok Kataria <akataria@...are.com>
Cc:	"H. Peter Anvin" <hpa@...or.com>, Andi Kleen <andi@...stfloor.org>,
	LKML <linux-kernel@...r.kernel.org>,
	the arch/x86 maintainers <x86@...nel.org>,
	Daniel Hecht <dhecht@...are.com>
Subject: Re: [PATCH 0/4] V3 Hypervisor detection and tsc_reliable feature
	definition


* Alok Kataria <akataria@...are.com> wrote:

> Hi,
> 
> These patches define a framework for hypervisor detection and 
> setting of hypervisor feature bits. We define a 
> X86_FEATURE_TSC_RELIABLE bit which is a synthetic bit. This is set 
> when running under VMware. This feature bit is used to skip TSC 
> checks which can fail on virtualization platform due to timing 
> differences when running on virtual cpus.

okay, this looks a lot better structurally - the DMI angle and the 
synthetic CPU flag, and the clocksource smarts are all a clean 
approach. Peter, any objections?

	Ingo
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