linux-kernel - Re: [PATCH 1/1] edac x38: new MC driver module

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Message-Id: <20081107152830.a42766f3.mitake@clustcom.com>
Date:	Fri, 7 Nov 2008 15:28:30 +0000
From:	Hitoshi Mitake <mitake@...stcom.com>
To:	Andrew Morton <akpm@...ux-foundation.org>
Cc:	Doug Thompson <norsk5@...oo.com>, dougthompson@...ssion.com,
	linux-kernel@...r.kernel.org, ktaka@...stcom.com
Subject: Re: [PATCH 1/1] edac x38: new MC driver module

On Thu, 6 Nov 2008 16:46:41 -0800
Andrew Morton <akpm@...ux-foundation.org> wrote:

> On Wed, 5 Nov 2008 08:26:12 -0800 (PST)
> Doug Thompson <norsk5@...oo.com> wrote:
> 
> > > I wrote new version of this driver and tested. It works well.
> > > This is replacement for old version.
> > > Or should I send diff of two versions?
> > 
> > 
> > I would suggest sending a diff of what is now in the -mm tree to what it should be.
> 
> This driver is now in the mainline kernel so yes, a patch against that
> kernel is the only appropriate way of updating the driver.
> 

Sorry, and thanks for notification, Doug and Andrew.
This is patch against mainline kernel.

Signed-off-by: Hitoshi Mitake <mitake@...stcom.com>
Signed-off-by: Doug Thompson <dougthompson@...ssion.com>
---

Index: linux-2.6.28-rc3-git2/drivers/edac/Kconfig
===================================================================
--- linux-2.6.28-rc3-git2.orig/drivers/edac/Kconfig	2008-11-07 11:27:05.000000000 +0000
+++ linux-2.6.28-rc3-git2/drivers/edac/Kconfig	2008-11-07 11:27:14.000000000 +0000
@@ -104,7 +104,7 @@
 
 config EDAC_X38
 	tristate "Intel X38"
-	depends on EDAC_MM_EDAC && PCI && X86
+	depends on EDAC_MM_EDAC && PCI && (X86 || X86_64)
 	help
 	  Support for error detection and correction on the Intel
 	  X38 server chipsets.
Index: linux-2.6.28-rc3-git2/drivers/edac/x38_edac.c
===================================================================
--- linux-2.6.28-rc3-git2.orig/drivers/edac/x38_edac.c	2008-11-07 11:27:06.000000000 +0000
+++ linux-2.6.28-rc3-git2/drivers/edac/x38_edac.c	2008-11-07 11:27:29.000000000 +0000
@@ -162,10 +162,12 @@
 			 X38_ERRSTS_BITS);
 }
 
-static u64 x38_readq(const void __iomem *addr)
+#ifndef CONFIG_X86_64
+static u64 readq(const void __iomem *addr)
 {
 	return readl(addr) | (((u64)readl(addr + 4)) << 32);
 }
+#endif	/* CONFIG_X86_64 */
 
 static void x38_get_and_clear_error_info(struct mem_ctl_info *mci,
 				 struct x38_error_info *info)
@@ -184,9 +186,9 @@
 	if (!(info->errsts & X38_ERRSTS_BITS))
 		return;
 
-	info->eccerrlog[0] = x38_readq(window + X38_C0ECCERRLOG);
+	info->eccerrlog[0] = readq(window + X38_C0ECCERRLOG);
 	if (x38_channel_num == 2)
-		info->eccerrlog[1] = x38_readq(window + X38_C1ECCERRLOG);
+		info->eccerrlog[1] = readq(window + X38_C1ECCERRLOG);
 
 	pci_read_config_word(pdev, X38_ERRSTS, &info->errsts2);
 
@@ -197,10 +199,10 @@
 	 * should be UE info.
 	 */
 	if ((info->errsts ^ info->errsts2) & X38_ERRSTS_BITS) {
-		info->eccerrlog[0] = x38_readq(window + X38_C0ECCERRLOG);
+		info->eccerrlog[0] = readq(window + X38_C0ECCERRLOG);
 		if (x38_channel_num == 2)
 			info->eccerrlog[1] =
-				x38_readq(window + X38_C1ECCERRLOG);
+				readq(window + X38_C1ECCERRLOG);
 	}
 
 	x38_clear_error_info(mci);
--
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