linux-kernel - Re: [PATCH] x86: Support always running TSC on Intel CPUs

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Message-ID: <4922154E.4050108@zytor.com>
Date:	Mon, 17 Nov 2008 17:07:26 -0800
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Venki Pallipadi <venkatesh.pallipadi@...el.com>
CC:	Ingo Molnar <mingo@...e.hu>, Thomas Gleixner <tglx@...utronix.de>,
	linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] x86: Support always running TSC on Intel CPUs

Venki Pallipadi wrote:
>>>
>> I was under the impression that C2 was invoked by the chipset on a
>> thermal condition, at least on older (P3-era) processors.  Is that no
>> longer true?  If what you say is above (HLT and MWAIT only), then *was*
>> it ever true?
> 
> I should also add io port based C-state to HLT and MWAIT. But, that again is
> OS initiated.
> 
> I don't know of C2 invocation in thermal condition. Thermal condition, all
> CPUs that I know of (P3 and beyond), use either clock modulation or frequency
> changes. And on some such CPUs, where TSC runs at constant freq during such
> modulation/freq change, we set CONSTANT_TSC bit based on model number check.
> So, on CPUs earlier than those, we cannot use TSC or we have to scale TSC
> based on freq. This patch shouldn't have any impact for those CPUs.
> 

I believe there are CPUs -- again, in the P3-era range at least -- which 
invoke C2 from the chipset on thermal conditions (and basically PWM the 
CPU.)  I'd like to get that clarified so we don't trip up on that.

	-hpa

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