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Message-ID: <386072610811182342i701497bcne37e6ab0dbefbc5f@mail.gmail.com>
Date: Wed, 19 Nov 2008 15:42:14 +0800
From: "Bryan Wu" <cooloney@...nel.org>
To: "Andrew Morton" <akpm@...ux-foundation.org>
Cc: torvalds@...ux-foundation.org, mingo@...e.hu,
linux-kernel@...r.kernel.org, "Graf Yang" <graf.yang@...log.com>
Subject: Re: [PATCH 2/5] Blackfin arch: SMP supporting patchset: Blackfin header files and machine common code
On Wed, Nov 19, 2008 at 2:56 PM, Andrew Morton
<akpm@...ux-foundation.org> wrote:
> On Tue, 18 Nov 2008 17:05:05 +0800 Bryan Wu <cooloney@...nel.org> wrote:
>
>> From: Graf Yang <graf.yang@...log.com>
>>
>> Blackfin dual core BF561 processor can support SMP like features.
>> https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like
>>
>> In this patch, we provide SMP extend to Blackfin header files
>> and machine common code
>>
>>
>> ...
>>
>> +#define atomic_add_unless(v, a, u) \
>> +({ \
>> + int c, old; \
>> + c = atomic_read(v); \
>> + while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
>> + c = old; \
>> + c != (u); \
>> +})
>
> The macro references its args multiple times and will do weird or
> inefficient things when called with expressions which have
> side-effects, or which do slow things.
>
Right, I think we can replace them to inline functions
>>
>> ...
>>
>> +#include <asm/system.h> /* save_flags */
>> +
>> +static inline void set_bit(int nr, volatile unsigned long *addr)
>> {
>> int *a = (int *)addr;
>> int mask;
>> @@ -57,21 +91,23 @@ static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
>> a += nr >> 5;
>> mask = 1 << (nr & 0x1f);
>> local_irq_save(flags);
>> - *a &= ~mask;
>> + *a |= mask;
>
> I think you just broke clear_bit(). Maybe I'm misreading the diff.
>
>> local_irq_restore(flags);
>> }
>>
>>
>> ...
>>
>> +#define smp_mb__before_clear_bit() barrier()
>> +#define smp_mb__after_clear_bit() barrier()
>> +
>> +static inline void __set_bit(int nr, volatile unsigned long *addr)
>> +{
>> + int *a = (int *)addr;
>> + int mask;
>> +
>> + a += nr >> 5;
>> + mask = 1 << (nr & 0x1f);
>> + *a |= mask;
>> +}
>> +
>> +static inline void __clear_bit(int nr, volatile unsigned long *addr)
>> +{
>> + int *a = (int *)addr;
>> + int mask;
>> +
>> + a += nr >> 5;
>> + mask = 1 << (nr & 0x1f);
>> + *a &= ~mask;
>> +}
>> +
>> +static inline void __change_bit(int nr, volatile unsigned long *addr)
>> +{
>> + int mask;
>> + unsigned long *ADDR = (unsigned long *)addr;
>> +
>> + ADDR += nr >> 5;
>> + mask = 1 << (nr & 31);
>> + *ADDR ^= mask;
>> +}
>
> I'm surprised there isn't any generic code which can be used for the above.
>
As Nick said, include/asm-generic/bitops/non-atomic.h is the generic code.
We will try it.
>>
>> ...
>>
>
> Gad what a lot of code. I don't think I have time to read it all, sorry.
>
Thanks a lot for the review, I will forward this patchset to linux-arch.
-Bryan
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