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Message-ID: <f17812d70811251720u47bec50dt3734f5b2bb0d339@mail.gmail.com>
Date: Wed, 26 Nov 2008 09:20:51 +0800
From: "Eric Miao" <eric.y.miao@...il.com>
To: "Jaya Kumar" <jayakumar.lkml@...il.com>
Cc: "David Brownell" <dbrownell@...rs.sourceforge.net>,
"David Brownell" <david-b@...bell.net>,
"Sam Ravnborg" <sam@...nborg.org>,
"Jean Delvare" <khali@...ux-fr.org>,
"Eric Miao" <eric.miao@...vell.com>,
"Haavard Skinnemoen" <hskinnemoen@...el.com>,
"Philipp Zabel" <philipp.zabel@...il.com>,
"Russell King" <rmk@....linux.org.uk>,
"Ben Gardner" <bgardner@...tec.com>, "Greg KH" <greg@...ah.com>,
linux-arm-kernel@...ts.arm.linux.org.uk,
linux-fbdev-devel@...ts.sourceforge.net,
linux-kernel@...r.kernel.org
Subject: Re: [RFC 2.6.27 1/1] gpiolib: add support for batch set of pins
On Wed, Nov 26, 2008 at 6:52 AM, Jaya Kumar <jayakumar.lkml@...il.com> wrote:
> Beloved friends,
>
> I would like to request your feedback on the following idea. I hope I have
> made sure to CC all the right people and the right lists! If not, PLEASE
> let me know! I couldn't find a MAINTAINERS entry for gpiolib so I just
> used what I saw in the git log and have also added people and lists that
> I think may be interested.
>
> This is just an RFC. If you all feel it is looking like the right approach
> then I'll clean it up and make it a patch.
>
> Thanks,
> jaya
>
> am300epd was doing 800*600*16*gpio_set_value for each framebuffer transfer
> (it uses 16-pins of gpio as its data bus). I found this caused a wee
> performance limitation. This patch adds an API for gpio_set_value_bus
> which allows users to set batches of consecutive gpio together in a single
> call. I have done a test implementation on gumstix (pxa255) with am300epd
> and it provides a nice improvement in performance.
Using a bit mask will be more generic if the GPIOs are not contiguous.
Yet I still doubt this will be generic enough to be added to gpiolib.
The user of this gpio_set_value_bus() may assume too much about
the internal, e.g. how many GPIOs on the chip and whether these GPIOs
are contiguous or not, and whether this GPIO chip support bitwise
operations.
Let's have a concrete example: what if the user gives a bunch of GPIOs
that crosses the chip boundary, say, GPIO29 - GPIO35 (with each chip
covering 32 GPIOs).
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