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Date: Thu, 27 Nov 2008 14:51:25 +0100 From: Andi Kleen <andi@...stfloor.org> To: eranian@...il.com Cc: Thomas Gleixner <tglx@...utronix.de>, Andi Kleen <andi@...stfloor.org>, David Miller <davem@...emloft.net>, linux-kernel@...r.kernel.org, akpm@...ux-foundation.org, mingo@...e.hu, x86@...nel.org, sfr@...b.auug.org.au Subject: Re: [patch 05/24] perfmon: X86 generic code (x86) On Thu, Nov 27, 2008 at 02:37:47PM +0100, stephane eranian wrote: > On Thu, Nov 27, 2008 at 2:32 PM, Thomas Gleixner <tglx@...utronix.de> wrote: > > On Thu, 27 Nov 2008, stephane eranian wrote: > >> That's true for Intel. > >> On AMD64, I think you can get at most one sample out of a irq-off > >> region using IBS. > > > > Exactly the same amount which you get with the NMI/self_IPI out of an > > irq-off region. > > > Why would you get only one sample per irq-off region if you use NMI? > I would think you could get multiple, depending on your sampling period > and the size of the region. Because of the self IPI. You would need a NMI safe queue between NMI and self IPI, but then you could as well have the same queue between NMI and process readers. -Andi -- ak@...ux.intel.com -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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