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Message-ID: <alpine.DEB.1.10.0902112142050.13954@gandalf.stny.rr.com>
Date:	Wed, 11 Feb 2009 21:43:14 -0500 (EST)
From:	Steven Rostedt <rostedt@...dmis.org>
To:	Kenji Kaneshige <kaneshige.kenji@...fujitsu.com>
cc:	"Luck, Tony" <tony.luck@...el.com>, Ingo Molnar <mingo@...e.hu>,
	Mike Travis <travis@....com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Peter Zijlstra <peterz@...radead.org>,
	Arnaldo Carvalho de Melo <acme@...hat.com>,
	Frederic Weisbecker <fweisbec@...il.com>,
	"isimatu.yasuaki@...fujitsu.com" <isimatu.yasuaki@...fujitsu.com>
Subject: Re: [PATCH 0/8] git pull request for tip/tracing/core


On Thu, 12 Feb 2009, Kenji Kaneshige wrote:
> Luck, Tony wrote:
> >>> Before we go and make the change, Peter brought up a good point on IRC. Is
> >>> there any reason that ia64 needs 1 << 14 IRQs?  That's 16384!
> >>>
> >>> Perhaps the better solution wolud be (if possible), to simply lower the
> >>> number of bits.
> >> i'm the wrong person to be asked about that. (Cc:-ed the right people)
> > 
> > People build some pretty big systems on ia64.  SGI's largest has 4096
> > cpus ... so 16384 IRQs is only 4 per cpu.  That doesn't sound like very
> > many to me.
> > 
> > Fujitsu added the vector domain support for ia64 to get around the shortage
> > of IRQs for large machines.  Added them to the Cc: list to see if they have
> > comments on how many IRQs are needed.
> > 
> 
> The 1024 IRQs are enough for GSIs on our maximum configuration. But
> if the devices are MSI/MSI-X capable, it could be more than 1024. 

But you would never expect more than 1024 nested interrupts all on the 
same CPU?  That is, to have over 1024 interrupts interrupting each other?

-- Steve

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