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Message-ID: <49B850F7.90401@gmail.com> Date: Wed, 11 Mar 2009 18:01:59 -0600 From: Robert Hancock <hancockrwd@...il.com> To: protagora27 protagora27 <protagora27@...il.com> CC: linux-kernel@...r.kernel.org Subject: Re: pci express bar over 4gb protagora27 protagora27 wrote: > Hello Folks, > > I have intel desktop board dx48bt2. I'm developing sw under linux > 2.6.24 x86_64 for a pci express card ( pci express 2.0 compliant). > I have to setup pci bar over 4 gb but bios uses value e0000000 as base > address for pcie boards. > I have seen that pciexbar is a register ( x48 chipset) that decides > where pcie boards are mapped inside memory map. No, the PCIEXBAR register controls where the MMCONFIG aperture is mapped in memory. (It's a rather unfortunate name, I think, as it doesn't really have anything to do with PCI Express other than that you need to use MMCONFIG to access PCI Express extended configuration space). > My goal is rewriting pcibar 0 e pcibar 1 with a value above 4gb. Maybe > I have to rewrite pciexbar and then rewrite pci bar in my board. > Questions: > 1) can I rewrite pciexbar and where ? > 2) can i rewrite pcibar 0 and 1 with a value over 4 gb > 3) If i change bar 0 and bar 1 after linux startup have i to use hotplugging ? > > Thanks > > Luca -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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