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Message-ID: <49D093F4.2080202@linux.intel.com>
Date: Mon, 30 Mar 2009 11:42:12 +0200
From: Andi Kleen <ak@...ux.intel.com>
To: Ingo Molnar <mingo@...e.hu>
CC: Hidetoshi Seto <seto.hidetoshi@...fujitsu.com>,
"H. Peter Anvin" <hpa@...or.com>,
Thomas Gleixner <tglx@...utronix.de>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH -tip 1/3] x86, mce: Add mce_threshold option for intel
cmci
> Makes sense. CMCI is a new CPU feature so having boot controls to
> disable it is generally a good idea - while still having old-style
> MCE support in place.
That's not what the patch does unfortunately.
> Applied to tip:x86/mce2, thanks Hidetoshi!
If you fear that CMCI is misbehaving you would need a different option to turn
it off completely, setting the threshold doesn't help. For example there are
banks that only support threshold == 1 and when the enable bit is on
then no matter what value you write in there events will cause CMCIs. So
this patch cannot turn them off.
To turn it off you would need to disable the CMCI enable bit
completely.
I have no problems in principle with a mce=nocmci that does that
but that would be a different patch.
However I expect that this will be not a good idea to ever use on Nehalem
class systems at least because without CMCI the machine check code cannot
handle shared banks correctly and you'll get duplicated events from them.
And on non Nehalem systems there is no CMCI anyways, so it'll be always off.
-Andi
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