linux-kernel - [PATCH 2/2] sata_sil: disable DMA engine in ->freeze

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Message-ID: <20090407232331.GA16190@havoc.gtf.org>
Date:	Tue, 7 Apr 2009 19:23:31 -0400
From:	Jeff Garzik <jeff@...zik.org>
To:	linux-ide@...r.kernel.org, LKML <linux-kernel@...r.kernel.org>
Cc:	Alan Cox <alan@...rguk.ukuu.org.uk>, d.harrison@...us.com,
	sagar.borikar@...il.com
Subject: [PATCH 2/2] sata_sil: disable DMA engine in ->freeze


Dustin, please see if these two patches solve your problem?


commit a6a2da59f2a4ba834a6e20e2d2a4d030bb9371ea
Author: Jeff Garzik <jeff@...zik.org>
Date:   Tue Apr 7 19:18:32 2009 -0400

    [libata] sata_sil: disable DMA engine in sil_freeze()
    
    We must disable the DMA engine before accessing taskfile registers.
    
    Signed-off-by: Jeff Garzik <jgarzik@...hat.com>

diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c
index e67ce8e..896975f 100644
--- a/drivers/ata/sata_sil.c
+++ b/drivers/ata/sata_sil.c
@@ -565,6 +565,19 @@ static void sil_freeze(struct ata_port *ap)
 	tmp |= SIL_MASK_IDE0_INT << ap->port_no;
 	writel(tmp, mmio_base + SIL_SYSCFG);
 	readl(mmio_base + SIL_SYSCFG);	/* flush */
+
+	/* Ensure DMA_ENABLE is off.
+	 *
+	 * This is because the controller will not give us access to the
+	 * taskfile registers while a DMA is in progress
+	 */
+	iowrite8(ioread8(ap->ioaddr.bmdma_addr) & ~SIL_DMA_ENABLE,
+		 ap->ioaddr.bmdma_addr);
+
+	/* According to ata_bmdma_stop, an HDMA transition requires
+	 * on PIO cycle. But we can't read a taskfile register.
+	 */
+	ioread8(ap->ioaddr.bmdma_addr);
 }
 
 static void sil_thaw(struct ata_port *ap)
--
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