linux-kernel - Re: [PATCH 2/2] sata_sil: disable DMA engine in ->freeze

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Message-ID: <3fb94e50904072213n637525b1w4b032544dcef3618@mail.gmail.com>
Date:	Wed, 8 Apr 2009 10:43:31 +0530
From:	Sagar Borikar <sagar.borikar@...il.com>
To:	Jeff Garzik <jeff@...zik.org>
Cc:	linux-ide@...r.kernel.org, LKML <linux-kernel@...r.kernel.org>,
	Alan Cox <alan@...rguk.ukuu.org.uk>, d.harrison@...us.com
Subject: Re: [PATCH 2/2] sata_sil: disable DMA engine in ->freeze

This patch works for our platform.

Thanks
Sagar

On Wed, Apr 8, 2009 at 4:53 AM, Jeff Garzik <jeff@...zik.org> wrote:
>
> Dustin, please see if these two patches solve your problem?
>
>
> commit a6a2da59f2a4ba834a6e20e2d2a4d030bb9371ea
> Author: Jeff Garzik <jeff@...zik.org>
> Date:   Tue Apr 7 19:18:32 2009 -0400
>
>    [libata] sata_sil: disable DMA engine in sil_freeze()
>
>    We must disable the DMA engine before accessing taskfile registers.
>
>    Signed-off-by: Jeff Garzik <jgarzik@...hat.com>
>
> diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c
> index e67ce8e..896975f 100644
> --- a/drivers/ata/sata_sil.c
> +++ b/drivers/ata/sata_sil.c
> @@ -565,6 +565,19 @@ static void sil_freeze(struct ata_port *ap)
>        tmp |= SIL_MASK_IDE0_INT << ap->port_no;
>        writel(tmp, mmio_base + SIL_SYSCFG);
>        readl(mmio_base + SIL_SYSCFG);  /* flush */
> +
> +       /* Ensure DMA_ENABLE is off.
> +        *
> +        * This is because the controller will not give us access to the
> +        * taskfile registers while a DMA is in progress
> +        */
> +       iowrite8(ioread8(ap->ioaddr.bmdma_addr) & ~SIL_DMA_ENABLE,
> +                ap->ioaddr.bmdma_addr);
> +
> +       /* According to ata_bmdma_stop, an HDMA transition requires
> +        * on PIO cycle. But we can't read a taskfile register.
> +        */
> +       ioread8(ap->ioaddr.bmdma_addr);
>  }
>
>  static void sil_thaw(struct ata_port *ap)
>
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