linux-kernel - RE: TSC unstable on Intel Pentium M processor 750

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Message-ID: <70DF5CB591F94B45BBC9BD2D41A047EF@xiaomao>
Date:	Thu, 30 Apr 2009 15:40:02 +0800
From:	"Mao Yilu" <ylmao@...l.ustc.edu.cn>
To:	"'Henrique de Moraes Holschuh'" <hmh@....eng.br>
Cc:	<linux-kernel@...r.kernel.org>
Subject: RE: TSC unstable on Intel Pentium M processor 750

> -----Original Message-----
> From: linux-kernel-owner@...r.kernel.org
> [mailto:linux-kernel-owner@...r.kernel.org] On Behalf Of Henrique de Moraes
> Holschuh
> Sent: Thursday, April 30, 2009 11:12 AM
> To: Mao Yilu
> Cc: 'Robert Hancock'; linux-kernel@...r.kernel.org
> Subject: Re: TSC unstable on Intel Pentium M processor 750
> 
> On Thu, 30 Apr 2009, Mao Yilu wrote:
> > But I still don't know why the TSC is not correct in the C1 state (hlt
> > instruction). Is there anything more to influence the TSC? What happened
> > when the CPU is not running under hlt instruction?
> 
> SMIs?  Laptops love that crap...

What is SMIs?


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