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Message-Id: <200905301532.30450.lkml@morethan.org>
Date:	Sat, 30 May 2009 15:32:28 -0500
From:	"Michael S. Zick" <lkml@...ethan.org>
To:	"H. Peter Anvin" <hpa@...or.com>
Cc:	Pavel Machek <pavel@....cz>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	Ingo Molnar <mingo@...e.hu>,
	"Thomas Gleixner <tglx@...utronix.de> Suresh Siddha" 
	<suresh.siddha@...el.com>, Tejun Heo <tj@...nel.org>,
	Venkatesh Pallapadi <venkatesh.pallapadi@...el.com>,
	Zhang Rui <rui.zhang@...el.com>
Subject: Re: [GIT PULL] x86 fixes for 2.6.30-rc8

On Sat May 30 2009, H. Peter Anvin wrote:
> Michael S. Zick wrote:
> > On Sat May 30 2009, Pavel Machek wrote:
> >> Hi!
> >>
> >>> --- a/Documentation/kernel-parameters.txt
> >>> +++ b/Documentation/kernel-parameters.txt
> >>> @@ -1535,6 +1535,10 @@ and is between 256 and 4096 characters. It is defined in the file
> >>>  			register save and restore. The kernel will only save
> >>>  			legacy floating-point registers on task switch.
> >>>  
> >>> +	noxsave		[BUGS=X86] Disables x86 extended register state save
> >>> +			and restore using xsave. The kernel will fallback to
> >>> +			enabling legacy floating-point and sse state.
> >>> +
> >> Does that mean apps using sse8 will see their registers corrupted if
> >> this option is used? Or are new registers sets always added in a way
> >> that kernel has to enable them first?
> 
> New register sets always require enabling.
> 
> > Has this change been tested on the processors that have independent ftp&sse
> > units, without the shared registers?  Such as the VIA C7-M?
> 
> x87 and SSE are always separate.  Whether or not register sets are
> separate is an architectural issue, and isn't subject to variation
> across CPUs.
> 

In this case they are but I am glad to hear that Intel and VIA Tech.
are working this closely together.  It simplifies the support issues.

Mike
> 	-hpa
> 


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