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Message-ID: <4A286CDB.80708@gmail.com>
Date:	Thu, 04 Jun 2009 18:54:51 -0600
From:	Robert Hancock <hancockrwd@...il.com>
To:	lkml@...eThan.org
CC:	Andi Kleen <andi@...stfloor.org>,
	Harald Welte <HaraldWelte@...tech.com>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	Duane Griffin <duaneg@...da.com>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: Linux 2.6.30-rc8 [also: VIA Support]

Michael S. Zick wrote:
> VIA has not publicly published sufficient technical information to presume
> that the cache coherency control protocols are the same as Intel's.
> 
> These are cpu/chipset pairs - Think System On 2 Chips. SoS2C.

At the low level, maybe not, but functionally it has to be equivalent. 
Otherwise the chip can't really be considered x86-compatible.
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