linux-kernel - Re: [RFC 6/7] x86: Move kernel_fpu

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Message-Id: <1245290268.11965.190.camel@yhuang-dev.sh.intel.com>
Date:	Thu, 18 Jun 2009 09:57:48 +0800
From:	Huang Ying <ying.huang@...el.com>
To:	"H. Peter Anvin" <hpa@...or.com>
Cc:	Ingo Molnar <mingo@...e.hu>,
	Herbert Xu <herbert@...dor.apana.org.au>,
	Thomas Gleixner <tglx@...utronix.de>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-crypto@...r.kernel.org" <linux-crypto@...r.kernel.org>
Subject: Re: [RFC 6/7] x86: Move kernel_fpu_using to asm/i387.h

On Thu, 2009-06-18 at 01:06 +0800, H. Peter Anvin wrote:
> Ingo Molnar wrote:
> >>  
> >> +static inline int kernel_fpu_using(void)
> >> +{
> >> +	if (in_interrupt() && !(read_cr0() & X86_CR0_TS))
> >> +		return 1;
> >> +	return 0;
> >> +}
> >> +
> > 
> > Looks sane to me. Herbert, do you ack it?
> > 
> 
> Although I have to say, the structure of:
> 
> if (boolean test)
> 	return 1;
> return 0;
> 
> ... truly was hit with the ugly stick.  It really should be:
> 
> static inline bool kernel_fpu_using(void)
> {
> 	return in_interrupt() && !(read_cr0() && C86_CR0_TS);
> }

Yes. This is better. I will change this.

> Huang: if I recall correctly, these functions were originally designed
> to deal with the fact that VIA processors generate spurious #TS faults
> due to broken design of the Padlock instructions.  The AES and PCLMUL
> instructions actually use SSE registers and so will require different
> structure.

They are a little different. VIA want to make sure that they can deal
with spurious #TS faults, while AES and PCLMUL need to check whether
MMX/SSE registers are available.

After some thinking, I think something as follow may be more
appropriate:

/* This may be useful for someone else */
static inline bool fpu_using(void)
{
	return !(read_cr0() & X86_CR0_TS);
}

static inline bool irq_fpu_using(void)
{
	return in_interrupt() && fpu_using();
}

Best Regards,
Huang Ying


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