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Message-ID: <4A487720.5080500@oxtel.com>
Date: Mon, 29 Jun 2009 09:11:12 +0100
From: Chris Pringle <chris.pringle@...el.com>
To: Sergej.Stepanov@....de
CC: scottwood@...escale.com, linuxppc-dev@...ts.ozlabs.org,
linux-kernel@...r.kernel.org
Subject: Re: AW: PowerPC PCI DMA issues (prefetch/coherency?)
Hi Sergej,
I've attached the patch used to fix this issue. Both the patch to
pgtable32.h and head_32.S are required in order to make it work. The
change to pgtable32.h ensures that all pages are marked cache coherent
(results in setting the M bit). The change to head_32.S ensures that the
M bit is not unconditionally masked out - it should only be masked out
if CPU_FTR_NEED_COHERENT is not set.
Hope this helps.
Cheers,
Chris
Sergej.Stepanov@....de wrote:
>> The other part of the fix is in asm-powerpc/pgtable32.h. _PAGE_BASE
>> needs _PAGE_COHERENT in order to work correctly, and in fact there is
>> now a comment in there to that affect in 2.6.29. Backporting that change
>> has made it work on 2.6.26. Both this patch, and the fix to head_32.S
>> are needed for it to work correctly on older kernels.
>>
>> Chris
>>
>
> Hello Chris,
>
> sorry for dummy, but if it possible, could you, please, send a corresponding summary patch of backporting you've done for older kernels?
> or just summary of that changes once again?
>
> Many thanks
>
> Sergej.
--
______________________________
Chris Pringle
Software Engineer
Miranda Technologies Ltd.
Hithercroft Road
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UK
Tel. +44 1491 820206
Fax. +44 1491 820001
www.miranda.com
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View attachment "dma-cache-coherency-fix.patch" of type "text/x-patch" (2591 bytes)
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