linux-kernel - Re: [PATCH V2] x86: SGU UV Add volatile semantics to macros that access chipset registers

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Message-ID: <4AA86CFA.8090000@zytor.com>
Date:	Wed, 09 Sep 2009 20:05:30 -0700
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Jack Steiner <steiner@....com>
CC:	Chris Friesen <cfriesen@...tel.com>,
	Daniel Walker <dwalker@...o99.com>, mingo@...e.hu,
	tglx@...utronix.de, linux-kernel@...r.kernel.org
Subject: Re: [PATCH V2] x86: SGU UV Add volatile semantics to macros that
 access chipset registers

On 09/09/2009 07:22 PM, Jack Steiner wrote:
> Add volatile-semantics to the SGI UV read/write macros that are
> used to access chipset memory mapped registers. No direct
> references to volatile are made. Instead the readq/writeq
> macros are used.
> 
> Signed-off-by: Jack Steiner <steiner@....com>

The -q part of readq/writeq is qword, 64 bits.  It looks like you're
replacing references of other sizes with qword references; was that
intended?

	-hpa

-- 
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.

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