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Message-ID: <20090910032330.GA10878@sgi.com>
Date:	Wed, 9 Sep 2009 22:23:30 -0500
From:	Jack Steiner <steiner@....com>
To:	"H. Peter Anvin" <hpa@...or.com>
Cc:	Chris Friesen <cfriesen@...tel.com>,
	Daniel Walker <dwalker@...o99.com>, mingo@...e.hu,
	tglx@...utronix.de, linux-kernel@...r.kernel.org
Subject: Re: [PATCH V2] x86: SGU UV Add volatile semantics to macros that access chipset registers

On Wed, Sep 09, 2009 at 08:05:30PM -0700, H. Peter Anvin wrote:
> On 09/09/2009 07:22 PM, Jack Steiner wrote:
> > Add volatile-semantics to the SGI UV read/write macros that are
> > used to access chipset memory mapped registers. No direct
> > references to volatile are made. Instead the readq/writeq
> > macros are used.
> > 
> > Signed-off-by: Jack Steiner <steiner@....com>
> 
> The -q part of readq/writeq is qword, 64 bits.  It looks like you're
> replacing references of other sizes with qword references; was that
> intended?

No, it was not. Most macros are quad-word but I see one that should have been
"char".

Thanks for catching that.  New patch in the morning.

--- jack
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