linux-kernel - Re: [PATCH] arm: remove unused code in delay.S

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Date:	Tue, 15 Sep 2009 11:30:10 -0500
From:	Steve Chen <schen@...sta.com>
To:	Marek Vasut <marek.vasut@...il.com>
Cc:	Pavel Machek <pavel@....cz>,
	Felipe Contreras <felipe.contreras@...il.com>,
	Jamie Lokier <jamie@...reable.org>,
	Russell King - ARM Linux <linux@....linux.org.uk>,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH] arm: remove unused code in delay.S

On Tue, 2009-09-15 at 15:41 +0200, Marek Vasut wrote:
> > -#if 0
> > +#if CONFIG_OLD_CPU_DELAY
> 
> ifdef please
> 
I assume this a vote in favor of considering this patch as an
alternative :)  The updated patch is below.  Since I'm only summarizing
the e-mail thread and put them into a patch (which is a less time
consuming process than continue reading and deleting e-mails on this
thread), contributors can add signed off before submitting to Russel.

Document #if 0 code block in delay.S and make it selectable for compile.

Signed-off-by: Steve Chen <schen@...sta.com>

---

 arch/arm/Kconfig     |    8 ++++++++
 arch/arm/lib/delay.S |    2 +-
 2 files changed, 9 insertions(+), 1 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index aef63c8..ca8d535 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -813,6 +813,14 @@ config ARM_ERRATA_460075
 	  ACTLR register. Note that setting specific bits in the ACTLR
register
 	  may not be available in non-secure mode.
 
+config OLD_CPU_DELAY
+	depends on CPU_32v3 || CPU_32v4 || CPU_32v4T
+	bool "Accurate delays for older CPU"
+	def_bool n
+	help
+	  Enable if observing longer than expected delays and need more
+	  accurate delays on older CPUs.
+
 endmenu
 
 source "arch/arm/common/Kconfig"
diff --git a/arch/arm/lib/delay.S b/arch/arm/lib/delay.S
index 8d6a876..67e679b 100644
--- a/arch/arm/lib/delay.S
+++ b/arch/arm/lib/delay.S
@@ -42,7 +42,7 @@ ENTRY(__const_udelay)				@ 0 <= r0 <= 0x7fffff06
 @ Delay routine
 ENTRY(__delay)
 		subs	r0, r0, #1
-#if 0
+#ifdef CONFIG_OLD_CPU_DELAY
 		movls	pc, lr
 		subs	r0, r0, #1
 		movls	pc, lr


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