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Message-ID: <1257485984.2299.21.camel@falcon.domain.org>
Date: Fri, 06 Nov 2009 13:39:44 +0800
From: Wu Zhangjin <wuzhangjin@...il.com>
To: Ralf Baechle <ralf@...ux-mips.org>
Cc: linux-mips@...ux-mips.org, LKML <linux-kernel@...r.kernel.org>,
huhb@...ote.com, yanh@...ote.com, Zhang Le <r0bertz@...too.org>,
Thomas Gleixner <tglx@...utronix.de>,
Nicholas Mc Guire <der.herr@...r.at>, zhangfx@...ote.com,
liujl@...ote.com
Subject: Re: [PATCH -queue v0 4/6] [loongson] add basic fuloong2f support
On Thu, 2009-11-05 at 14:16 +0100, Ralf Baechle wrote:
> On Wed, Nov 04, 2009 at 05:05:47PM +0800, Wu Zhangjin wrote:
>
> > diff --git a/arch/mips/loongson/fuloong-2f/irq.c b/arch/mips/loongson/fuloong-2f/irq.c
> > new file mode 100644
> > index 0000000..22c45fd
> > --- /dev/null
> > +++ b/arch/mips/loongson/fuloong-2f/irq.c
> > @@ -0,0 +1,114 @@
> > +/*
> > + * Copyright (C) 2007 Lemote Inc.
> > + * Author: Fuxin Zhang, zhangfx@...ote.com
> > + *
> > + * This program is free software; you can redistribute it and/or modify it
> > + * under the terms of the GNU General Public License as published by the
> > + * Free Software Foundation; either version 2 of the License, or (at your
> > + * option) any later version.
> > + */
> > +
> > +#include <linux/interrupt.h>
> > +
> > +#include <asm/irq_cpu.h>
> > +#include <asm/i8259.h>
> > +#include <asm/mipsregs.h>
> > +
> > +#include <loongson.h>
> > +#include <machine.h>
> > +
> > +#define LOONGSON_TIMER_IRQ (MIPS_CPU_IRQ_BASE + 7) /* cpu timer */
> > +#define LOONGSON_PERFCNT_IRQ (MIPS_CPU_IRQ_BASE + 6) /* cpu perf counter */
> > +#define LOONGSON_NORTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 6) /* bonito */
> > +#define LOONGSON_UART_IRQ (MIPS_CPU_IRQ_BASE + 3) /* cpu serial port */
> > +#define LOONGSON_SOUTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 2) /* i8259 */
> > +
> > +#define LOONGSON_INT_BIT_INT0 (1 << 11)
> > +#define LOONGSON_INT_BIT_INT1 (1 << 12)
> > +
> > +static int mach_i8259_irq(void)
> > +{
> > + int irq, isr, imr;
> > +
> > + irq = -1;
> > +
> > + if ((LOONGSON_INTISR & LOONGSON_INTEN) & LOONGSON_INT_BIT_INT0) {
> > + imr = inb(0x21) | (inb(0xa1) << 8);
> > + isr = inb(0x20) | (inb(0xa0) << 8);
> > + isr &= ~0x4; /* irq2 for cascade */
> > + isr &= ~imr;
> > + irq = ffs(isr) - 1;
> > + }
>
> Any reason why you're not using i8259_irq() from <asm/i8259.h> here?
> That function not only gets the locking right, it also minimizes the number
> of accesses to the i8259 - which even on modern silicon can be stuningly
> slow.
>
Hi, Ralf
Just asked Yanhua, He told me there is a bug in cs5536, if using the
i8259_irq() directly, we can not get the irq. and just tried it, the
kernel hang on booting.
Regards,
Wu Zhangjin
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