lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Tue, 10 Nov 2009 21:53:42 +0100 From: Ingo Molnar <mingo@...e.hu> To: Dave Jones <davej@...hat.com>, x86@...nel.org, Linux Kernel <linux-kernel@...r.kernel.org> Subject: Re: Fix typo in intel cache size * Dave Jones <davej@...hat.com> wrote: > I double-checked the datasheet. This should be 2MB. > > Signed-off-by: Dave Jones <davej@...hat.com> > > diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c > index 804c40e..6123138 100644 > --- a/arch/x86/kernel/cpu/intel_cacheinfo.c > +++ b/arch/x86/kernel/cpu/intel_cacheinfo.c > @@ -94,7 +94,7 @@ static const struct _cache_table __cpuinitconst cache_table[] = > { 0xd1, LVL_3, 1024 }, /* 4-way set assoc, 64 byte line size */ > { 0xd2, LVL_3, 2048 }, /* 4-way set assoc, 64 byte line size */ > { 0xd6, LVL_3, 1024 }, /* 8-way set assoc, 64 byte line size */ > - { 0xd7, LVL_3, 2038 }, /* 8-way set assoc, 64 byte line size */ > + { 0xd7, LVL_3, 2048 }, /* 8-way set assoc, 64 byte line size */ ah, thanks - applied. I also marked both fixes from you for -stable backport - these are pretty risk-free fixes and cpuinfo looks ugly on new CPUs without a proper cache size entry. Thanks, Ingo -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists