linux-kernel - RE: [RFC][PATCH 03/10] arm: mxc: changes to common plat-mxc codeto add support for i.MX5

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Date:	Mon, 7 Dec 2009 11:06:14 -0700
From:	"Herring Robert-RA7055" <ra7055@...escale.com>
To:	"Sascha Hauer" <s.hauer@...gutronix.de>
Cc:	"Amit Kucheria" <amit.kucheria@...onical.com>,
	"List Linux Kernel" <linux-kernel@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>,
	<valentin.longchamp@...l.ch>, <daniel@...aq.de>,
	<grant.likely@...retlab.ca>,
	"Nguyen Dinh-R00091" <R00091@...escale.com>
Subject: RE: [RFC][PATCH 03/10] arm: mxc: changes to common plat-mxc codeto add support for i.MX5

Sasha,

> @@ -296,7 +299,7 @@ void __init mxc_timer_init(struct clk 
> *timer_clk, void __iomem *base, int irq)
>  	__raw_writel(0, timer_base + MXC_TCTL);
>  	__raw_writel(0, timer_base + MXC_TPRER); /* see 
> datasheet note */
>  
> -	if (cpu_is_mx3() || cpu_is_mx25())
> +	if (timer_is_v2())
>  		tctl_val = MX3_TCTL_CLK_IPG | MX3_TCTL_FRR | 
> MX3_TCTL_WAITEN | MXC_TCTL_TEN;

The timer clock input needs to be per_clk, not ipg_clk on MX51. It is
safe to always be set to per_clk because per_clk == ipg_clk on MX31/35
and MX27 IIRC. This makes the clock constant even with cpu and bus
scaling and allows disabling of PLLs.

#define MX3_TCTL_CLK_PER       (2 << 6)

       if (timer_is_v2())
               tctl_val = MX3_TCTL_CLK_PER | MX3_TCTL_FRR |
MX3_TCTL_WAITEN | MXC_TCTL_TEN;

Regards,
Rob
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